1. Field of the Invention
The present invention relates to a semiconductor device and a method of fabricating the same, and more particularly, to a semiconductor device which is resin-encapsulated in a semiconductor wafer state and a method of fabricating the semiconductor device. Thus, the invention deals with such a semiconductor device as described above having high reliability for interconnection and a method of fabricating the semiconductor device.
2. Description of the Related Art
Portable equipment have lately come into widespread use at a rapid pace, and this has been accompanied by increasing demands for semiconductor devices mounted therein, which are thinner in thickness, smaller in size, and lighter in weight than conventional ones. Thereupon, a number of packaging technologies have been proposed in order to cope with such demands.
As one of such technologies, a chip size package (referred to hereinafter as CSP) equivalent or substantially equivalent in size to a semiconductor chip with an integrated circuit formed thereon has been developed.
There has been available a conventional CSP wherein a rewiring made of Cu, to be connected to each of electrode pads of a semiconductor chip, is formed, terminals called posts, to be connected to the rewiring, are formed for redisposing the electrode pads, the surface of the semiconductor chip is encapsulated with resin to a height of each of the terminals, and a metallic electrode such as a solder ball etc. is provided at the tip of each of the terminals, exposed out of the resin.
In a method of fabricating the CSP, a polyimide layer is first formed over a semiconductor wafer, a rewiring pattern made of Cu, to be connected to an electrode pad of a plurality of semiconductor chips formed on the semiconductor wafer, is formed, and terminals called posts, to be connected to respective rewirings, are formed, thereby redisposing the electrode pads. Subsequently, the entire surface of the semiconductor wafer with the terminals formed thereon is resin-encapsulated, and after curing of resin, a resin is abraded to the extent that the tips of the respective terminals are exposed. Furthermore, the exposed tip of each of the terminals is provided with a metallic electrode such as a solder ball etc. before dicing the semiconductor wafer into separated pieces for individual semiconductor chips.
However, when a temperature cycle test is repeatedly conducted on such a CSP as described above after it is mounted on a substrate, there arises a possibility of cracks occurring to the metallic electrodes such as the solder balls etc. This is attributable to a large difference in thermal expansivity between the CSP and the substrate, which results in concentration of stress in a bonding portion between the metallic electrode and the post. An alternative cause may be a small area of bonding between the respective metallic electrodes and the respective terminals of the CSP due to a narrow spacing between the terminals, which results in a reduced bonding force between the metallic electrode and the post.
It is an object of the invention to provide a semiconductor device having high reliability for interconnection and a method of fabricating the semiconductor device.
To this end, the invention provides a semiconductor device comprising a semiconductor chip having a plurality of electrode pads formed on the upper surface thereof, a terminal formed on the upper surface of the semiconductor chip, electrically connected to each of the electrode pads, a resin formed on the upper surface of the semiconductor chip, encapsulating the terminal such that the terminal is exposed out of the resin to the extent of a predetermined height, and an electroconductor formed to be connected to the terminal.
Further, the present invention provides a method of fabricating the semiconductor device comprising a step of forming terminals on a plurality of chips formed on a semiconductor wafer, respectively, each of said terminals being electrically connected to an electrode pad of each of the chips, a step of forming a resin on the upper surface of the semiconductor wafer, on the side of the terminals, so as to encapsulate the terminals, a step of exposing the side wall face of the terminal by removing a portion of the resin on the terminal and around the same, and a step of dicing the semiconductor wafer into separated pieces for the respective chips.